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  september 2013 doc id 10873 rev 4 1/26 1 VNQ600AP-E quad channel high side driver features ? dc short circuit current: 25 a ? cmos compatible inputs ? proportional load current sense ? undervoltage and overvoltage shutdown ? overvoltage clamp ? thermal shutdown ? current limitation ? very low standby power dissipation ? p rotection against: loss of ground and loss of v cc ? reverse battery protection (a) ? in compliance with the 2002/95/ec european directive description the VNQ600AP-E is a quad hsd formed by assembling two vnd600-e chips in the same so- 28 package. the vnd600-e is a monolithic device designed in | stmicroelectronics vipower m0-3 technology. the VNQ600AP-E is intended for driving any type of multiple loads with one side connected to ground. this device has four independent channels and four analog sense outputs which deliver currents proportional to the outputs currents. active current limitation combined with thermal shutdown and automatic restart protect the device against overload. device automatically turns off in case of ground pin disconnection. type r ds(on) (1) 1. per each channel i lim v cc VNQ600AP-E 35 m ? 25 a 36 v a. see application schematic on page 14 . table 1. device summary package order codes tube tape and reel so-28 VNQ600AP-E vnq600aptr-e so-28 (double island) www.st.com
contents VNQ600AP-E 2/26 doc id 10873 rev 4 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 14 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 microcontroller i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.5 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 19 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 so-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 so-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VNQ600AP-E list of tables doc id 10873 rev 4 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unuse d and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. switching (v cc =13 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. v cc - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. current sense (9 v< v cc < 16 v) (see figure 7 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 12. electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 14. electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 15. thermal calculation according to the pcb heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 16. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 17. so-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures VNQ600AP-E 4/26 doc id 10873 rev 4 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. switching characterist ics (resistive load rl= 2.6 ? ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. waveforms (per each chip). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. iout/isense versus iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 8. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 9. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 12. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 13. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 14. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 15. ilim vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 17. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 18. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 19. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 20. maximum turn-off current vers us load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. so-28 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 21 figure 24. thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. thermal fitting model of a quad channel hsd in so -28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. so-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. so-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 28. so-28 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
VNQ600AP-E block diagram and pin description doc id 10873 rev 4 5/26 1 block diagram and pin description figure 1. block diagram logic undervoltage overvoltage overtemp. 1 overtemp. 2 i lim2 demag 2 k i out2 i lim1 demag 1 k i out1 input 1 input 2 gnd 1,2 v cc 1,2 output 1 current sense 1 output 2 current sense 2 driver 2 driver 1 logic undervoltage overvoltage overtemp. 3 overtemp. 4 i lim4 demag 4 k i out4 i lim3 demag 3 k i out3 input 3 input 4 gnd 3,4 v cc 3,4 output 3 current sense 3 output 4 current sense 4 driver 4 driver 3
block diagram and pin description VNQ600AP-E 6/26 doc id 10873 rev 4 figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection/pin current sense n.c. output input floating not allowed x x x to ground through 1 k ?? resistor x not allowed through 10 k ?? resistor v cc 1,2 gnd 1,2 input2 input1 current v cc 1,2 v cc 3,4 gnd 3,4 input4 input3 v cc 3,4 sense 1 v cc 3,4 output 4 output 4 output 4 output 3 output 2 output 2 output 2 output 1 v cc 1,2 output 3 output 3 output 1 output 1 current sense 2 current sense 3 current sense 4 1 14 15 28
VNQ600AP-E electrical specifications doc id 10873 rev 4 7/26 2 electrical specifications figure 3. current and voltage conventions 1. v fn = v ccn - v outn during reverse battery condition 2.1 absolute maximum ratings table 3. absolute maximum rating symbol parameter value unit v cc supply voltage (continuous) 41 v -v cc reverse supply voltage (continuous) -0.3 v i out output current (continuous), for each channel 15 a i r reverse output current (continuous), for each channel -15 a i in input current +/- 10 ma v csense current sense maximum voltage -3 +15 v v i gnd ground current at t pins < 25 c (continuous) -200 ma v esd electrostatic discharge (human body model: r=1.5 k ?? c=100 pf) - input - current sense - output - v cc 4000 2000 5000 5000 v v v v e max maximum switching energy (l=0.11 mh; r l =0 ? ; v bat =13.5 v; t jstart =150 oc; i l =40 a) 126 mj p tot power dissipation (per island) at t lead =25 c 6.25 w
electrical specifications VNQ600AP-E 8/26 doc id 10873 rev 4 2.2 thermal data 2.3 electrical characteristics values specified in th is section are for 8 v VNQ600AP-E electrical specifications doc id 10873 rev 4 9/26 i l(off3) off-state output current v in =v out =v sense =0 v; v cc =13 v; t j =125 c --5a i l(off4) off-state output current v in =v out =v sense =0 v; v cc =13 v; t j =25 c --3a 1. per island 2. vclamp and v ov are correlated. typical difference is 5 v. table 5. power (continued) symbol parameter test conditions min. typ. max. unit table 6. switching (v cc =13 v) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l =2.6 ? channels 1,2,3,4 (see figure 4 ) -40-s t d(off) turn-off delay time r l =2.6 ? channels 1,2,3,4 (see figure 4 ) -40-s (dv out /dt) on turn-on voltage slope r l =2.6 ? channels 1,2,3,4 (see figure 4 ) - see relative diagra m -v ? s (dv out /dt) off turn-off voltage slope r l =2.6 ? channels 1,2,3,4 (see figure 4 ) - see relative diagra m -v ? s table 7. v cc - output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage -i out =2.3 a; t j =150 c - - 0.6 v table 8. logic input symbol parameter test conditions min. typ. max. unit v il low level input voltage - - 1.25 v v ih high level input voltage 3.25 - - v v i(hyst) input hysteresis voltage 0.5 - - v i il low level input current v in =1.25 v 20 65 - a i ih high level input current v in =3.25 v - 75 110 a v icl input clamp voltage i in =1 ma i in = -1 ma 66.8 -0.7 8v v
electrical specifications VNQ600AP-E 10/26 doc id 10873 rev 4 table 9. protections (1) symbol parameter test conditions min. typ. max. unit i lim dc short circuit current v cc =13 v 5.5 v8 v; i out1,2 =4 a; r sense =10 k ? 2 4 -- v v v senseh analog sense output voltage in over temperature condition v cc =13 v; r sense =3.9 k ? -5-v r vsenseh analog sense output impedance in over temperature condition v cc =13 v; t j >t tsd ; all channels open -400 - ? t dsense current sense delay response to 90% i sense (1) - - 500 s 1. current sense signal delay after positive input slope.
VNQ600AP-E electrical specifications doc id 10873 rev 4 11/26 table 11. truth table conditions input output sense normal operation l h l h 0 nominal over temperature l h l l 0 v senseh undervoltage l h l l 0 0 overvoltage l h l l 0 0 short circuit to gnd l h h l l l 0 (t j t tsd ) v senseh short circuit to v cc l h h h 0 < nominal negative output voltage clamp l l 0 table 12. electrical transient requirements (part 1/3) iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms, 10 ? 2 +25 v +50 v +75 v +100 v 0.2 ms, 10 ? 3a -25v -50v -100v -150v 0.1s, 50 ? 3b +25 v +50 v +75 v +100 v 0.1 s, 50 ? 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 ? 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 ? table 13. electrical transient requirements (part 2/3) iso t/r 7637/1 test pulse test levels result iiiiiiiv 1c c c c 2c c c c 3a c c c c 3b c c c c 4c c c c 5c e e e
electrical specifications VNQ600AP-E 12/26 doc id 10873 rev 4 figure 4. switching characteristics (resistive load r l = 2.6 ? ) table 14. electrical transient requirements (part 3/3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper op eration without replacing the device. v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense
VNQ600AP-E electrical specifications doc id 10873 rev 4 13/26 figure 5. waveforms (per each chip) sense n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc sense n input n sense n load current n load current n load current n overtemperature input n sense n t tsd t r t j load current n v ov v cc > v ov v cc < v ov short to ground input n load current n sense n load voltage n input n load voltage n sense n load current n application information VNQ600AP-E 14/26 doc id 10873 rev 4 3 application information figure 6. application schematic note: channels 3 and 4 have the same internal circuit as channel 1 and 2 3.1 gnd protection network against reverse battery this section provides two so lutions for implementing a ground protection network against reverse battery. solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd ? 600 mv / 2(i s(on)max ) 2. r gnd ???? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not common with the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output v cc1,2 output2 c. sense 1 d ld +5v r prot output1 r sense1,2,3,4 input1 c. sense 2 input2 ? c r prot r prot r prot input3 input4 c. sense 3 c. sense 4 d gnd r gnd v gnd gnd1,2 gnd3,4 output3 r prot r prot r prot r prot v cc3,4 output4
VNQ600AP-E application information doc id 10873 rev 4 15/26 values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the st sugges ts to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1 k ? ) should be inserted in parallel to d gnd if the device will be driv ing an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift ( 600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares th e same diode/resistor network. series resistor in input line is also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input pin is to leave it unconnected, while unused sense pin has to be connected to ground pin. 3.2 load dump protection d ld is necessary (voltage transie nt suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than those shown in the iso t/r 7637/1 table. 3.3 microcontrolle r i/o protection if a ground protection network is used and negative transients are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/o pins from latching up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: -v ccpeak /i latchup ? r prot ? (v oh ? c -v ih -v gnd ) / i ihmax example for the following conditions: v ccpeak = -100 v i latchup ? 20 ma v oh ? c ? 4.5 v 5k ? ? r prot ? 65 k ? . recommended values are: r prot =5 k ? ?
application information VNQ600AP-E 16/26 doc id 10873 rev 4 figure 7. i out /i sense versus i out
VNQ600AP-E application information doc id 10873 rev 4 17/26 3.4 electrical char acteristics curves figure 8. off-state output current figure 9. high level input current figure 10. input clamp voltage figure 11. input high level figure 12. input low level figure 13. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 il(off1) (ua) off state vcc=36v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v)
application information VNQ600AP-E 18/26 doc id 10873 rev 4 figure 14. overvoltage shutdown figure 15. i lim vs t case figure 16. turn-on voltage slope figure 17. turn-off voltage slope figure 18. on-state resistance vs tcase figure 19. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 ilim (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (oc) 250 300 350 400 450 500 550 600 650 700 750 dvout/dt(on) (v/ms) vcc=13v rl=2.6ohm -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 50 100 150 200 250 300 350 400 450 500 dvout/dt(off) (v/ms) vcc=13v rl=2.6ohm -75 -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 90 100 ron (mohm) iout=5a vcc=8v & 36v 5 10152025303540 vcc (v) 0 10 20 30 40 50 60 70 80 ron (mohm) iout=5a tc= 150c tc= 25c tc= - 40c
VNQ600AP-E application information doc id 10873 rev 4 19/26 3.5 maximum demagnetization energy (v cc = 13.5v) figure 20. maximum turn-off current versus load inductance legend: a = single pulse at t jstart =150 oc b = repetitive pulse at t jstart =100 oc c = repetitive pulse at t jstart =125 oc conditions: v cc =13.5 v values are generated with rl=0 ? in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. figure 21. demagnetization 1 10 100 0.001 0.01 0.1 1 10 100 l(mh) i lmax (a) a b c v in , i l t demagnetization demagnetization demagnetization
package and pcb thermal data VNQ600AP-E 20/26 doc id 10873 rev 4 4 package and pcb thermal data 4.1 so-28 thermal data figure 22. so-28 pc board note: layout condition of r th and z th measurements (pcb fr4 area=58 mm x 58 mm, pcb thickness=2 mm, cu thickness=35 m, copper areas: 0.5 cm 2 , 3 cm 2 , 6 cm 2 ). r tha = thermal resistance junction to ambient with one chip on r thb = thermal resistance junction to ambient with both chips on and p dchip1 =p dchip2 r thc = mutual thermal resistance table 15. thermal calculation according to the pcb heatsink area chip 1 chip 2 t jchip1 t jchip2 note on off r tha x p dchip1 + t amb r thc x p dchip1 + t amb off on r thc x p dchip2 + t amb r tha x p dchip2 + t amb on on r thb x (p dchip1 + p dchip2 ) + t amb r thb x (p dchip1 + p dchip2 ) + t amb p dchip1 =p dchip2 on on (r tha x p dchip1 ) + r thc x p dchip2 + t amb (r tha x p dchip2 ) + r thc x p dchip1 + t amb p dchip1 ? p dchip2
VNQ600AP-E package and pcb thermal data doc id 10873 rev 4 21/26 figure 23. r thj-amb vs pcb copper area in open box free air condition figure 24. thermal impedance junction ambient single pulse 10 20 30 40 50 60 70 01234567 pcb cu heatsink area (cm ^2)/island rt hj_am b (c/w) 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 time(s) zth(c/w) 6 cm ^2/island 3 cm ^2/island 0,5 cm ^2/island one channel on two channels on on same chip
package and pcb thermal data VNQ600AP-E 22/26 doc id 10873 rev 4 equation 1 : pulse calculation formula where figure 25. thermal fitting model of a quad channel hsd in so-28 table 16. thermal parameter area/island (cm 2 )0.56 r1=r7=r13=r15 (c/w) 0.05 - r2=r8=r14=r16 (c/w) 0.3 - r3=r9 (c/w) 3.4 - r4=r10 (c/w) 11 - r5=r11 (c/w) 15 - r6=r12 (c/w) 30 13 c1=c7=c13=c15 (w.s/c) 0.001 - c2=c8=c14=c16 (w.s/c) 5.00e-03 - c3=c9 (w.s/c) 1.00e-02 - c4=c10 (w.s/c) 0.2 - c5=c11 (w.s/c) 1.5 - c6=c12 (w.s/c) 5 8 r17=r18 (c/w) 150 - z th ? r th ? z thtp 1 ? ? ?? + ? = ? t p t ? = pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r14 c13 c14 r13 tj_1 tj_2 t_amb pd3 c7 r10 c9 c10 r9 r7 r12 r11 r8 c11 c12 c8 pd4 r16 c15 c16 r15 tj_3 tj_4 r17 r18
VNQ600AP-E package and packing information doc id 10873 rev 4 23/26 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack? packages, depending on their le vel of environmental compliance. ecopack? specifications, grade definitions a nd product status are available at: www.st.com . ecopack? is an st trademark. figure 26. so-28 package dimensions table 17. so-28 mechanical data dim. mm. inch min. typ max. min. typ. max. a - - 2.65 - - 0.104 a1 0.10 - 0.30 0.004 - 0.012 b 0.35 - 0.49 0.013 - 0.019 b1 0.23 - 0.32 0.009 - 0.012 c - 0.50 - - 0.020 - c1 45 (typ.) - d 17.7 - 18.1 0.697 - 0.713 e 10.00 - 10.65 0.393 - 0.419 e - 1.27 - - 0.050 - e3 - 16.51 - - 0.650 - f 7.40 - 7.60 0.291 - 0.299 l 0.40 - 1.27 0.016 - 0.050 s 8 (max.) -
package and packing information VNQ600AP-E 24/26 doc id 10873 rev 4 5.2 so-28 packing information figure 27. so-28 tube shipment (no suffix) figure 28. so-28 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 28 bulk q.ty 700 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 a c b base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 16.4 n (min) 60 t (max) 22.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 16 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 7.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
VNQ600AP-E revision history doc id 10873 rev 4 25/26 6 revision history table 18. document revision history date revision changes 01-oct-2004 1 initial release. 08-jun-2009 2 features: ? changed i lim value from 22 a to 25 a ? changed dc short circuit current value from 22 a to 25 a table 9 : changed i lim min value from 22 a to 25 a 15-oct-2009 3 updated figure 2: configuration diagram (top view) . 20-sep-2013 4 updated disclaimer.
VNQ600AP-E 26/26 doc id 10873 rev 4 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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